AMD today gave a detailed look at its first ARM-based server processor, the Opteron A1100 "Seattle." Seattle has eight 64-bit ARM Cortex-A57 cores arranged into four pairs, with each pair sharing 1MB of level 2 cache. All eight cores share an 8 MB level 3 cache. There are two memory controllers, supporting both DDR3 and DDR4, enabling a total of 128GB ECC memory in total.
These cores all share a set of I/O options. The system-on-a-chip has 8 lanes of PCIe 3.0 for expansion cards and 8 lanes of SATA revision 3.0 for storage. Network connectivity comes from two 10GBASE-KR controllers. (10GBASE-KR is a short-range specification designed for copper connections to backplanes in blade servers and modular routers.)
AMD shows off the guts of its first ARM server chip | Ars Technica